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» On the Circuit Implementation Problem
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VTS
2008
IEEE
77views Hardware» more  VTS 2008»
16 years 1 months ago
Test-Pattern Ordering for Wafer-Level Test-During-Burn-In
—Wafer-level test during burn-in (WLTBI) is a promising technique to reduce test and burn-in costs in semiconductor manufacturing. However, scan-based testing leads to significa...
Sudarshan Bahukudumbi, Krishnendu Chakrabarty
CEC
2007
IEEE
16 years 1 months ago
Graph design by graph grammar evolution
— Determining the optimal topology of a graph is pertinent to many domains, as graphs can be used to model a variety of systems. Evolutionary algorithms constitute a popular opti...
Martin H. Luerssen, David M. W. Powers
GLVLSI
2007
IEEE
135views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Exact sat-based toffoli network synthesis
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...
Daniel Große, Xiaobo Chen, Gerhard W. Dueck,...
ICNS
2007
IEEE
16 years 1 months ago
Point-to-Point Services in Hybrid Networks: Technologies and Performance Metrics
Research networks, apart from pure IP packet-switched services, progressively introduce hybrid services, which combine packet switching and circuit switching technologies. Optical...
Athanassios Liakopoulos, Andreas Hanemann, Afrodit...
IEEESCC
2007
IEEE
16 years 1 months ago
Development of NeuronBank: A Federation of Customizable Knowledge Bases of Neuronal Circuitry
Knowledge of neuronal circuitry is foundational to the neurosciences, but no tools have been developed for cataloguing this knowledge. Part of the problem is that the concepts use...
Robert J. Calin-Jageman, Akshaye Dhawan, Hong Yang...