10718 search results - page 563 / 2144 » On the Circuit Implementation Problem |
226
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CODES
2004
IEEE
15 years 11 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
190
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FASE
2000
Springer
15 years 10 months ago
2000
Springer
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and f...
218
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FMCAD
2000
Springer
15 years 10 months ago
2000
Springer
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
181
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FPGA
2000
ACM
15 years 10 months ago
2000
ACM
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
190
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FPL
2000
Springer
15 years 10 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...