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» On the Circuit Implementation Problem
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FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 11 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
ATS
1998
IEEE
114views Hardware» more  ATS 1998»
15 years 11 months ago
Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used...
Zhen Guo, He Li, Shuling Guo, Dongsheng Wang
ICCAD
1998
IEEE
80views Hardware» more  ICCAD 1998»
15 years 11 months ago
On the optimization power of retiming and resynthesis transformations
Retiming and resynthesis transformations can be used for optimizing the area, power, and delay of sequential circuits. Even though this technique has been known for more than a de...
Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, R...
ISLPED
1998
ACM
78views Hardware» more  ISLPED 1998»
15 years 11 months ago
Power-delay tradeoffs for radix-4 and radix-8 dividers
The use of higher radices in division reduces the number of iterations to complete the operation, but increases the complexity of the circuit. In this paper we explore the in uenc...
Alberto Nannarelli, Tomás Lang
IPPS
1997
IEEE
15 years 11 months ago
Parallel Global Routing Algorithms for Standard Cells
In this paper, we propose three different parallel algorithms based on a state-of-the-art global router called TimberWolfSC. The parallel algorithms have been implemented by using...
Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee