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» On the Circuit Implementation Problem
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DATE
2009
IEEE
88views Hardware» more  DATE 2009»
15 years 11 months ago
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment
Growing test data volume and overtesting caused by excessive scan capture power are two of the major concerns for the industry when testing large integrated circuits. Various test...
Xiao Liu, Qiang Xu
EUROPAR
2004
Springer
15 years 10 months ago
Imprecise Exceptions in Distributed Parallel Components
Abstract. Modern microprocessors have sacrificed the exactness of exceptions for improved performance long ago. This is a side effect of reordering instructions so that the micropr...
Kostadin Damevski, Steven G. Parker
DAC
2005
ACM
15 years 9 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
15 years 9 months ago
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay,...
RC
1998
72views more  RC 1998»
15 years 6 months ago
Interval + Image = Wavelet: For Image Processing under Interval Uncertainty, Wavelets Are Optimal
In computer and electronic manufacturing, it is very important to be able to automatically check whether the surface mounted devices (SMD) are correctly placed on the printed circ...
Alejandro E. Brito, Olga Kosheleva