10718 search results - page 459 / 2144 » On the Circuit Implementation Problem |
199
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ASPDAC
2011
ACM
14 years 10 months ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
198
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DAC
2009
ACM
16 years 8 months ago
2009
ACM
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
194
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DAC
2002
ACM
16 years 8 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
147
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DAC
2004
ACM
16 years 8 months ago
2004
ACM
The negative effect of electromigration on signal and power line lifetime and functional reliability is an increasingly important problem for the physical design of integrated cir...
180
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ISQED
2010
IEEE
16 years 1 months ago
2010
IEEE
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...