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ICCD
2004
IEEE
111views Hardware» more  ICCD 2004»
16 years 3 months ago
Potential Slack Budgeting with Clock Skew Optimization
Potential slack is an effective metric of circuit’s possible performance improvement. It is equal to the maximal amount of slack that can be potentially used for optimization. I...
Kai Wang, Malgorzata Marek-Sadowska
ICCD
2001
IEEE
90views Hardware» more  ICCD 2001»
16 years 3 months ago
On The Micro-architectural Impact of Clock Distribution Using Multiple PLLs
Clock distribution has traditionally been a circuit design problem with negligible micro-architectural impact. However, for clock distribution networks using multiple phase-locked...
Martin Saint-Laurent, Madhavan Swaminathan, James ...
ICCD
2000
IEEE
88views Hardware» more  ICCD 2000»
16 years 3 months ago
Dynamic Flip-Flop with Improved Power
An improved design of a dynamic Flip-Flop is presented. Proposed design overcomes the problem of the glitch at the output and improves Power-Delay Product for about 10%, while pre...
Nikola Nedovic, Vojin G. Oklobdzija
APPROX
2009
Springer
104views Algorithms» more  APPROX 2009»
16 years 1 months ago
Improved Polynomial Identity Testing for Read-Once Formulas
An arithmetic read-once formula (ROF for short) is a formula (a circuit whose underlying graph is a tree) in which the operations are {+, ×} and such that every input variable la...
Amir Shpilka, Ilya Volkovich
IPPS
2007
IEEE
16 years 1 months ago
A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA
This work addresses the problem of information leakage of cryptographic devices, by using the reconfiguration technique allied to an RNS based arithmetic. The information leaked b...
Daniel Mesquita, Benoît Badrignans, Lionel T...