10718 search results - page 432 / 2144 » On the Circuit Implementation Problem |
151
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IFIP
1989
Springer
15 years 11 months ago
1989
Springer
ÐBSR (Broadcasting with Selective Reduction) is a PRAM more powerful than any CRCW PRAM. In order to extend the Broadcast Instruction of BSR and make it more useful for a large cl...
140
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DELTA
2004
IEEE
15 years 10 months ago
2004
IEEE
Complex arithmetic computations, especially if derived from bit-level software descriptions, can be very inefficient if implemented directly in hardware (e.g., by translation of t...
160
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DAC
2005
ACM
15 years 9 months ago
2005
ACM
This paper presents an efficient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory e...
131
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
211
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CODES
2005
IEEE
16 years 17 days ago
2005
IEEE
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...