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DATE
2000
IEEE
82views Hardware» more  DATE 2000»
15 years 11 months ago
Constructive Library-Aware Synthesis Using Symmetries
In this paper a constructive library-aware multilevel logic synthesis approach using symmetries is described. It integrates the technology-independent and technologydependent stag...
Victor N. Kravets, Karem A. Sakallah
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
15 years 11 months ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
ISCAS
1999
IEEE
100views Hardware» more  ISCAS 1999»
15 years 11 months ago
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...
Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud...
ISMVL
1998
IEEE
113views Hardware» more  ISMVL 1998»
15 years 11 months ago
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiplevalued LUT can be implemented using both current-mode and voltage-mode ...
Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak
ASPLOS
1996
ACM
15 years 11 months ago
The Case for a Single-Chip Multiprocessor
Advances in IC processing allow for more microprocessor design options. The increasing gate density and cost of wires in advanced integrated circuit technologies require that we l...
Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ke...