10718 search results - page 375 / 2144 » On the Circuit Implementation Problem |
183
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TACAS
2010
Springer
16 years 1 months ago
2010
Springer
Boolean satisfiability (SAT) and its extensions are becoming a core technology for the analysis of systems. The SAT-based approach divides into three steps: encoding, preprocessin...
175
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GLVLSI
2009
IEEE
16 years 1 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
209
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MEMOCODE
2007
IEEE
16 years 1 months ago
2007
IEEE
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
169
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FPGA
2007
ACM
16 years 1 months ago
2007
ACM
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
198
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DATE
2006
IEEE
16 years 27 days ago
2006
IEEE
In this paper, we propose a timing-reasoning algorithm to improve the resolution of delay fault diagnosis. In contrast to previous approaches which identify candidates by utilizin...