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» On the Circuit Implementation Problem
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ICISC
2009
125views Cryptology» more  ICISC 2009»
15 years 4 months ago
Power Analysis of Single-Rail Storage Elements as Used in MDPL
Several dual-rail logic styles make use of single-rail flip-flops for storing intermediate states. We show that single mask bits, as applied by various side-channel resistant logic...
Amir Moradi, Thomas Eisenbarth, Axel Poschmann, Ch...
IACR
2011
97views more  IACR 2011»
14 years 6 months ago
Two-Output Secure Computation with Malicious Adversaries
We present a method to compile Yao’s two-player garbled circuit protocol into one that is secure against malicious adversaries that relies on witness indistinguishability. Our ap...
Abhi Shelat, Chih-Hao Shen
SBCCI
2005
ACM
98views VLSI» more  SBCCI 2005»
16 years 9 days ago
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation
This work addresses the problem of application mapping in networks-on-chip (NoCs). It explores the importance of characterizing network traffic to effectively predict NoC energy c...
José Carlos S. Palma, César A. M. Ma...
SIGCOMM
2003
ACM
15 years 12 months ago
Scaling internet routers using optics
Routers built around a single-stage crossbar and a centralized scheduler do not scale, and (in practice) do not provide the throughput guarantees that network operators need to ma...
Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, Da...
INTEGRATION
2006
82views more  INTEGRATION 2006»
15 years 6 months ago
On whitespace and stability in physical synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible ...
Saurabh N. Adya, Igor L. Markov, Paul G. Villarrub...