ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
Jagdish Nayayan Pandey, Sudhir S. Kudva, Bharadwaj...
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...