10718 search results - page 312 / 2144 » On the Circuit Implementation Problem |
185
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
Existing built-in self test (BIST) strategies require the use of specialized test pattern generation hardware which introduces signi cant area overhead and performance degradation...
192
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
154
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FPGA
2006
ACM
15 years 10 months ago
2006
ACM
This paper presents experimental measurements of the differences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power cons...
154
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ASPDAC
2001
ACM
15 years 10 months ago
2001
ACM
In this paper, we o introduce the Reusable Embedded In-Circuit Emulator (EICE) and Reusable EICE development system. The main function in EICE we design are testing and debugging. ...
178
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EH
2000
IEEE
15 years 10 months ago
2000
IEEE
The differences between electronics design through artificial evolution and through conventional methods have the consequence that evolved circuits may take unusual leverage from ...