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» On the Circuit Implementation Problem
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DAC
1999
ACM
15 years 10 months ago
Parallel Mixed-Level Power Simulation Based on Spatio-Temporal Circuit Partitioning
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
Mauro Chinosi, Roberto Zafalon, Carlo Guardiani
ISLPED
1996
ACM
69views Hardware» more  ISLPED 1996»
15 years 10 months ago
Substrate noise influence on circuit performance in variable threshold-voltage scheme
- This paper investigates substrate noise influence on circuit performance in a variable thresholdvoltage scheme (VT scheme) where threshold voltage is dynamically varied by substr...
Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Tosh...
PADS
1996
ACM
15 years 10 months ago
Conservative Circuit Simulation on Shared-Memory Multiprocessors
We investigate conservative parallel discrete event simulations for logical circuits on shared-memory multiprocessors. For a first estimation of the possible speedup, we extend th...
Jörg Keller, Thomas Rauber, Bernd Rederlechne...
SERP
2003
15 years 7 months ago
Experiences Developing an E-Whiteboard-Based Circuit Designer
E-whiteboards - large image display surfaces (LIDS) that support data input with pen-based sketching - have become more readily available in recent times. We describe a prototype ...
Ray Liu, Lisa Wong, John C. Grundy
ICALP
2003
Springer
15 years 11 months ago
Oracle Circuits for Branching-Time Model Checking
A special class of oracle circuits with tree-vector form is introduced. It is shown that they can be evaluated in deterministic polynomial-time with a polylog number of adaptive qu...
Ph. Schnoebelen