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2003
Springer
15 years 11 months ago
On Timing Analysis of Combinational Circuits
In this paper we report some progress in applying timed automata technology to large-scale problems. We focus on the problem of finding maximal stabilization time for combinationa...
Ramzi Ben Salah, Marius Bozga, Oded Maler
TCS
2002
15 years 6 months ago
Neural circuits for pattern recognition with small total wire length
One of the most basic pattern recognition problems is whether a certain local feature occurs in some linear array to the left of some other local feature. We construct in this art...
Robert A. Legenstein, Wolfgang Maass
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
15 years 10 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
15 years 10 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
15 years 11 months ago
Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics
As research begins to explore potential nanotechnologies for future post-CMOS integrated systems, modeling and simulation environments must be developed that can accommodate the c...
Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan