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GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
15 years 10 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
ICCAD
2000
IEEE
99views Hardware» more  ICCAD 2000»
15 years 10 months ago
On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools
The incremental, “construct by correction” design methodology has become widespread in constraint-dominated DSM design. We study the problem of ECO for physical design domains...
Andrew B. Kahng, Stefanus Mantik
ISCAS
1999
IEEE
95views Hardware» more  ISCAS 1999»
15 years 10 months ago
Evaluating iterative improvement heuristics for bigraph crossing minimization
The bigraph crossing problem, embedding the two node sets of a bipartite graph G = V0;V1;E along two parallel lines so that edge crossings are minimized, has application to placeme...
Matthias F. M. Stallmann, Franc Brglez, Debabrata ...
MICCAI
1999
Springer
15 years 10 months ago
On the Feasibility of a Moving Support for Surgery on the Beating Heart
Abstract. In this paper the use of a heart-tracking hand support is proposed to allow coronary artery bypass grafting surgery to take place on the beating heart. This method elimin...
Ana Luisa Trejos, S. E. Salcudean, F. Sassani, Sam...
IPPS
1998
IEEE
15 years 10 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...