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» On the Architecture of System Verification Environments
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FDL
2007
IEEE
16 years 1 months ago
Modelling Alternatives for Cycle Approximate Bus TLMs
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Martin Radetzki, Rauf Salimi Khaligh
FMICS
2006
Springer
15 years 10 months ago
Can Saturation Be Parallelised?
Abstract. Symbolic state-space generators are notoriously hard to parallelise. However, the Saturation algorithm implemented in the SMART verification tool differs from other seque...
Jonathan Ezekiel, Gerald Lüttgen, Radu Simini...
IIWAS
2008
15 years 8 months ago
A model-prover for constrained dynamic conversations
In a service-oriented architecture, systems communicate by exchanging messages. In this work, we propose a formal model based on OCL-constrained UML Class diagrams and a methodolo...
Diletta Cacciagrano, Flavio Corradini, Rosario Cul...
COMCOM
2006
87views more  COMCOM 2006»
15 years 6 months ago
Practical utilities for monitoring multicast service availability
Monitoring has become one of the key issues for the successful deployment of IP multicast in the Internet. During the last decade, several tools and systems have been developed to ...
Pavan Namburi, Kamil Saraç, Kevin C. Almero...
DAC
2007
ACM
16 years 7 months ago
Modeling the Function Cache for Worst-Case Execution Time Analysis
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
Raimund Kirner, Martin Schoeberl