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» On the Architecture of System Verification Environments
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DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 10 months ago
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
IDEAS
1999
IEEE
131views Database» more  IDEAS 1999»
15 years 10 months ago
ISIS: A Semantic Mediation Model and an Agent Based Architecture for GIS Interoperability
The diversity of spatial information systems promotes the need to integrate heterogeneous spatial or geographic information systems (GIS) in a cooperative environment. This paper ...
Eric Leclercq, Djamal Benslimane, Kokou Yét...
COMSWARE
2006
IEEE
16 years 13 days ago
The SIMPLE presence and event architecture
— Current presence systems offer only basic services that are mostly useful for dial-up environments, while event services have not seen widespread deployment. We describe the SI...
Henning Schulzrinne
DAC
2003
ACM
16 years 7 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DAC
2006
ACM
16 years 7 months ago
Predicate learning and selective theory deduction for a difference logic solver
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
Chao Wang, Aarti Gupta, Malay K. Ganai