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ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
15 years 11 months ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya
IPPS
1998
IEEE
15 years 10 months ago
Fault Tolerant Mobility Planning for Rapidly Deployable Wireless Networks
Rapidly deployable wireless networks consist of mobile base stations and less powerful mobile hosts. The mobile base stations have to maintain wireless connectivity while on the mo...
Charles Shields Jr., Vikas Jain, Simeon C. Ntafos,...
TIME
1997
IEEE
15 years 10 months ago
Modal Event Calculi with Preconditions
Kowalski and Sergot’s Event Calculus (EC) is a simple temporal formalism that, given a set of event occurrences, allows the derivation of the maximal validity intervals (MVIs) o...
Iliano Cervesato, Massimo Franceschet, Angelo Mont...
ISCA
1996
IEEE
120views Hardware» more  ISCA 1996»
15 years 10 months ago
Missing the Memory Wall: The Case for Processor/Memory Integration
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...
Ashley Saulsbury, Fong Pong, Andreas Nowatzyk
COLT
1994
Springer
15 years 10 months ago
Rigorous Learning Curve Bounds from Statistical Mechanics
In this paper we introduce and investigate a mathematically rigorous theory of learning curves that is based on ideas from statistical mechanics. The advantage of our theory over ...
David Haussler, H. Sebastian Seung, Michael J. Kea...