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ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 12 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
DBPL
2005
Springer
135views Database» more  DBPL 2005»
15 years 12 months ago
Type-Based Optimization for Regular Patterns
Pattern matching mechanisms based on regular expressions feature in a number of recent languages for processing XML. The flexibility of these mechanisms demands novel approaches ...
Michael Y. Levin, Benjamin C. Pierce
ISCAS
2003
IEEE
126views Hardware» more  ISCAS 2003»
15 years 11 months ago
Low power block based FIR filtering cores
— The authors present a number of complete cores which are specially tailored for the low power implementation of FIR filters executed using block processing. The paper reveals t...
Ahmet T. Erdogan, Tughrul Arslan
CC
2003
Springer
126views System Software» more  CC 2003»
15 years 11 months ago
Offset Assignment Showdown: Evaluation of DSP Address Code Optimization Algorithms
Abstract. Offset assignment is a highly effective DSP address code optimization technique that has been implemented in a number of ANSI C compilers. In this paper we concentrate on...
Rainer Leupers
DSN
2002
IEEE
15 years 11 months ago
Experimental Evaluation of Time-redundant Execution for a Brake-by-wire Application
This paper presents an experimental evaluation of a brake-by-wire application that tolerates transient faults by temporal error masking. A specially designed real-time kernel that...
Joakim Aidemark, Jonny Vinter, Peter Folkesson, Jo...