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» On software design for stochastic processors
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LCPC
2004
Springer
15 years 11 months ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
ISSS
1995
IEEE
116views Hardware» more  ISSS 1995»
15 years 9 months ago
The Chinook hardware/software co-synthesis system
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
Pai H. Chou, Ross B. Ortega, Gaetano Borriello
ISPASS
2007
IEEE
16 years 13 days ago
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving
We have studied DRAM-level prefetching for the fully buffered DIMM (FB-DIMM) designed for multi-core processors. FB-DIMM has a unique two-level interconnect structure, with FB-DIM...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhan...
DAC
2003
ACM
16 years 7 months ago
Automated synthesis of efficient binary decoders for retargetable software toolkits
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
Wei Qin, Sharad Malik
DATE
2009
IEEE
114views Hardware» more  DATE 2009»
16 years 27 days ago
Hardware aging-based software metering
Abstract—Reliable and verifiable hardware, software and content usage metering (HSCM) are of primary importance for wide segments of e-commerce including intellectual property a...
Foad Dabiri, Miodrag Potkonjak