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» On software design for stochastic processors
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ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 9 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
CASES
2004
ACM
15 years 11 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
ASPLOS
2004
ACM
15 years 11 months ago
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
Multiple Clock Domain (MCD) processors are a promising future alternative to today’s fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor ...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
FPL
2007
Springer
176views Hardware» more  FPL 2007»
16 years 8 days ago
ReconOS: An RTOS supporting Hard- and Software Threads
Modern platform FPGAs integrate fine-grained reconfigurable logic with processor cores and allow the creation of complete configurable systems-on-chip. However, design methodol...
Enno Lübbers, Marco Platzner
CODES
2009
IEEE
15 years 10 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...