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» On software design for stochastic processors
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DCC
2007
IEEE
16 years 5 months ago
Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...
Milena Milenkovic, Aleksandar Milenkovic, Martin B...
ARCS
2009
Springer
16 years 23 days ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
CODES
2007
IEEE
16 years 16 days ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
PPPJ
2003
ACM
15 years 11 months ago
Efficient Java thread serialization
The Java system supports the transmission of code via dynamic class loading, and the transmission or storage of data via object serialization. However, Java does not provide any m...
Sara Bouchenak, Daniel Hagimont, Noel De Palma
RTAS
2006
IEEE
16 years 6 days ago
Real-Time Scheduling on Multicore Platforms
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
James H. Anderson, John M. Calandrino, UmaMaheswar...