We describe MASTERMIND, a step toward our vision of a knowledge-based design-time and run-time environment where human-computer interfaces development is centered around an all-en...
Robert Neches, James D. Foley, Pedro A. Szekely, P...
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Gioan showed that the number of cycle reversing classes of totally cyclic orientations of a given graph can be calculated as an evaluation of the corresponding Tutte polynomial. We...
Beifang Chen, Arthur L. B. Yang, Terence Y. J. Zha...
For a polynomial ring R = k[x1, ..., xn], we present a method to compute the characteristic cycle of the localization Rf for any nonzero polynomial f R that avoids a direct comput...
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...