Sciweavers

7288 search results - page 1153 / 1458
» On process rate semantics
Sort
View
ICCD
2003
IEEE
107views Hardware» more  ICCD 2003»
16 years 3 months ago
Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
Sudeep Pasricha, Alexander V. Veidenbaum
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
16 years 3 months ago
Exploiting Microarchitectural Redundancy For Defect Tolerance
Continued advancements in fabrication technology and reductions in feature size create challenges in maintaining both manufacturing yield rates and long-term reliability of device...
Premkishore Shivakumar, Stephen W. Keckler, Charle...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 3 months ago
Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage
Path delay fault testing becomes increasingly important due to higher clock rates and higher process variability caused by shrinking geometries. Achieving high-coverage path delay...
Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Pun...
CVPR
2010
IEEE
16 years 2 months ago
Efficiently Selecting Regions for Scene Understanding
Recent advances in scene understanding and related tasks have highlighted the importance of using regions to reason about high-level scene structure. Typically, the regions are ...
M. Pawan Kumar, Daphne Koller
SAC
2010
ACM
16 years 1 months ago
Botzilla: detecting the "phoning home" of malicious software
Hosts infected with malicious software, so called malware, are ubiquitous in today’s computer networks. The means whereby malware can infiltrate a network are manifold and rang...
Konrad Rieck, Guido Schwenk, Tobias Limmer, Thorst...
« Prev « First page 1153 / 1458 Last » Next »