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181
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CSFW
2000
IEEE
15 years 11 months ago
2000
IEEE
In this paper we develop a language of mobile agents called uPLAN for describing the capabilities of active (programmable) networks. We use a formal semantics for uPLAN to demonst...
145
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
In this paper, we present a BIST scheme for testing onchip AD and DA converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measurin...
108
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers,...
184
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DATE
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
170
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VTS
1999
IEEE
15 years 11 months ago
1999
IEEE
Ground bounce in internal circuitry is becoming an important design validation and test issue. In this paper a new circuit model for ground bounce in internal circuitry is propose...