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IPPS
1998
IEEE
15 years 11 months ago
Meta-heuristics for Circuit Partitioning in Parallel Test Generation
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
Consolación Gil, Julio Ortega, Antonio F. D...
ASPDAC
1998
ACM
160views Hardware» more  ASPDAC 1998»
15 years 11 months ago
Synthesis of Power Efficient Systems-on-Silicon
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...
DAC
1996
ACM
15 years 11 months ago
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis
In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance extraction is essential. Fast algorithms, such as the multipole or prec...
Narayan R. Aluru, V. B. Nadkarni, James White
ICDCS
1993
IEEE
15 years 11 months ago
Providing Performance Guarantees in an FDDI Network
A network subsystem supporting a continuous media file system must guarantee a minimum throughput, a maximum delay, and a maximum jitter. We present a transport protocol that pro...
Darrell D. E. Long, Carol Osterbrock, Luis-Felipe ...
SRDS
1994
IEEE
15 years 11 months ago
Probabilistic Internal Clock Synchronization
We propose an improved probabilistic method for reading remote clocks in systems subject to unbounded communication delays and use this method to design a family of fault-tolerant...
Flaviu Cristian, Christof Fetzer
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