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IPPS
2000
IEEE
15 years 10 months ago
Using Time Skewing to Eliminate Idle Time due to Memory Bandwidth and Network Limitations
Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and s...
David Wonnacott
ASPDAC
2000
ACM
117views Hardware» more  ASPDAC 2000»
15 years 10 months ago
Improved algorithms for hypergraph bipartitioning
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
CIAC
2000
Springer
105views Algorithms» more  CIAC 2000»
15 years 10 months ago
Algorithms for a Simple Point Placement Problem
We consideralgorithms for a simple one-dimensionalpoint placement problem: given N points on a line, and noisy measurements of the distances between many pairs of them, estimate th...
Joshua Redstone, Walter L. Ruzzo
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 10 months ago
Power minimization using system-level partitioning of applications with quality of service requirements
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
Gang Qu, Miodrag Potkonjak
HASE
1998
IEEE
15 years 10 months ago
Analytical Partition of Software Components for Evolvable and Reliable MEMS Design Tools
Transforming software requirements into a software design involves the iterative partition of a solution into software components. The process is human-intensive and does not guar...
Carol L. Hoover, Pradeep K. Khosla