We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
In addition to maintaining the GenBank(R) nucleic acid sequence database, the National Center for Biotechnology Information (NCBI) provides analysis and retrieval resources for th...
David L. Wheeler, Tanya Barrett, Dennis A. Benson,...
Given an undirected graph G = (V,E) and a source vertex s ∈ V , the k-traveling repairman (KTR) problem, also known as the minimum latency problem, asks for k tours, each starti...
Image segmentation with specific constraints has found applications in several areas such as biomedical image analysis and data mining. In this paper, we study the problem of sim...