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ICS
2005
Tsinghua U.
15 years 12 months ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
WMPI
2004
ACM
15 years 12 months ago
Scalable cache memory design for large-scale SMT architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
Muhamed F. Mudawar
EUROPAR
2004
Springer
15 years 12 months ago
Improving Data Cache Performance via Address Correlation: An Upper Bound Study
Address correlation is a technique that links the addresses that reference the same data values. Using a detailed source-code level analysis, a recent study [1] revealed that diffe...
Peng-fei Chuang, Resit Sendag, David J. Lilja
COCOON
2010
Springer
15 years 10 months ago
A Three-String Approach to the Closest String Problem
Given a set of n strings of length L and a radius d, the closest string problem (CSP for short) asks for a string tsol that is within a Hamming distance of d to each of the given ...
Zhi-Zhong Chen, Bin Ma, Lusheng Wang
JMLR
2008
141views more  JMLR 2008»
15 years 6 months ago
A New Algorithm for Estimating the Effective Dimension-Reduction Subspace
The statistical problem of estimating the effective dimension-reduction (EDR) subspace in the multi-index regression model with deterministic design and additive noise is consider...
Arnak S. Dalalyan, Anatoly Juditsky, Vladimir Spok...