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» On improving application utility prediction
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HPCA
2011
IEEE
14 years 10 months ago
ACCESS: Smart scheduling for asymmetric cache CMPs
In current Chip-multiprocessors (CMPs), a significant portion of the die is consumed by the last-level cache. Until recently, the balance of cache and core space has been primari...
Xiaowei Jiang, Asit K. Mishra, Li Zhao, Ravishanka...
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
16 years 28 days ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
KDD
2008
ACM
132views Data Mining» more  KDD 2008»
16 years 7 months ago
Partitioned logistic regression for spam filtering
Naive Bayes and logistic regression perform well in different regimes. While the former is a very simple generative model which is efficient to train and performs well empirically...
Ming-wei Chang, Wen-tau Yih, Christopher Meek
EWSN
2008
Springer
16 years 6 months ago
Characterizing Mote Performance: A Vector-Based Methodology
Sensors networks instrument the physical space using motes that run network embedded programs thus acquiring, processing, storing and transmitting sensor data. The motes commercial...
Martin Leopold, Marcus Chang, Philippe Bonnet
HIPEAC
2010
Springer
16 years 3 months ago
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
Yunlian Jiang, Kai Tian, Xipeng Shen