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NOCS
2007
IEEE
16 years 27 days ago
NoC-Based FPGA: Architecture and Routing
We present a novel network-on-chip-based architecture for future programmable chips (FPGAs). A key challenge for FPGA design is supporting numerous highly variable design instance...
Roman Gindin, Israel Cidon, Idit Keidar
ICESS
2007
Springer
16 years 23 days ago
Sleep Nodes Scheduling in Cluster-Based Heterogeneous Sensor Networks Using AHP
Abstract. Wireless sensor networks (WSNs) are comprised of energy constrained nodes. This limitation has led to the crucial need for energy-aware protocols to produce an efficient ...
Xiaoling Wu, Jinsung Cho, Brian J. d'Auriol, Sungy...
ISCAS
2006
IEEE
162views Hardware» more  ISCAS 2006»
16 years 19 days ago
Combined image signal processing for CMOS image sensors
This paper presents an efficient image signal processing structure for CMOS image sensors to achieve low area and power consumption. Although CMOS image sensors (CISs) have variou...
Kimo Kim, In-Cheol Park
INFOCOM
2005
IEEE
16 years 6 days ago
TCAM-based distributed parallel packet classification algorithm with range-matching solution
Packet Classification (PC) has been a critical data path function for many emerging networking applications. An interesting approach is the use of TCAM to achieve deterministic, hi...
Kai Zheng, Hao Che, Zhijun Wang, Bin Liu
ISPAN
1997
IEEE
15 years 10 months ago
A Parallel Pipelined Renderer for Time-Varying Volume Data
This paper presents a strategy for efficiently rendering time-varying volume data on a distributed-memory parallel computer. Visualizing time-varying volume data take both large s...
Tzi-cker Chiueh, Kwan-Liu Ma