Sciweavers

2658 search results - page 279 / 532
» On efficient balanced codes
Sort
View
ICMCS
2006
IEEE
181views Multimedia» more  ICMCS 2006»
16 years 20 days ago
A Fast Downsizing Video Transcoder for H.264/AVC with Rate-Distortion Optimal Mode Decision
This paper focuses on the mode decision and motion selection problem when H.264/AVC video streams are transcoded in spatial resolution. A fast downsizing transcoding scheme is dev...
Huifeng Shen, Xiaoyan Sun, Feng Wu, Houqiang Li, S...
ICCD
1999
IEEE
88views Hardware» more  ICCD 1999»
15 years 11 months ago
TriMedia CPU64 Application Development Environment
The architecture of the TriMedia CPU64 is based on the TM1000 DSPCPU. The original VLIW architecture has been extended with the concepts of vector processing and superoperations. ...
Evert-Jan D. Pol, Bas Aarts, Jos T. J. van Eijndho...
CODES
1998
IEEE
15 years 11 months ago
Optimistic distributed timed cosimulation based on thread simulation model
In this paper, we present thread-based optimistic distributed timed cosimulation methods which reduce the overhead of optimistic simulation. First, we present thread simulation mo...
Sungjoo Yoo, Kiyoung Choi
IPPS
1998
IEEE
15 years 11 months ago
Predicated Software Pipelining Technique for Loops with Conditions
An effort to formalize the process of software pipelining loops with conditions is presented in this paper. A formal framework for scheduling such loops, based on representing set...
Dragan Milicev, Zoran Jovanovic
CODES
2004
IEEE
15 years 10 months ago
Multi-objective mapping for mesh-based NoC architectures
In this paper we present an approach to multi-objective exploration of the mapping space of a mesh-based network-on-chip architecture. Based on evolutionary computing techniques, ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi