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176
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), ...
163
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
178
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ICS
2009
Tsinghua U.
16 years 1 months ago
2009
Tsinghua U.
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
205
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KDD
2009
ACM
16 years 1 months ago
2009
ACM
In this paper, we introduce a system named Argo which provides intelligent advertising made possible from users’ photo collections. Based on the intuition that user-generated ph...
164
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
In modern digital ICs, the increasing demand for performance and throughput requires operating frequencies of hundreds of megahertz, and in several cases exceeding the gigahertz r...