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» On distributed smooth scheduling
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CODES
2004
IEEE
15 years 10 months ago
Operation tables for scheduling in the presence of incomplete bypassing
Register bypassing is a powerful and widely used feature in modern processors to eliminate certain data hazards. Although complete bypassing is ideal for performance, bypassing ha...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
CASES
2005
ACM
15 years 8 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
TPDS
2008
92views more  TPDS 2008»
15 years 6 months ago
Max-Min Fair Scheduling in Input-Queued Switches
Fairness in traffic management can improve the isolation between traffic streams, offer a more predictable performance, eliminate transient bottlenecks, mitigate the effect of cer...
Madhusudan Hosaagrahara, Harish Sethu
PODC
2009
ACM
16 years 7 months ago
Oblivious interference scheduling
In the interference scheduling problem, one is given a set of n communication requests described by pairs of points from a metric space. The points correspond to devices in a wire...
Alexander Fanghänel, Berthold Vöcking, H...
EUROSYS
2007
ACM
16 years 3 months ago
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors
The major chip manufacturers have all introduced chip multiprocessing (CMP) and simultaneous multithreading (SMT) technology into their processing units. As a result, even low-end...
David K. Tam, Reza Azimi, Michael Stumm