3098 search results - page 137 / 620 » On distributed smooth scheduling |
148
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IPPS
2006
IEEE
16 years 15 days ago
2006
IEEE
The recurring real-time task model was recently proposed as a model for real-time processes that contain code with conditional branches. In this paper, we present a necessary and ...
184
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EUROPAR
2005
Springer
15 years 12 months ago
2005
Springer
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
152
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ICPP
2003
IEEE
15 years 11 months ago
2003
IEEE
The bus that connects processors to memory is known to be a major architectural bottleneck in SMPs. However, both software and scheduling policies for these systems generally focu...
179
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HOTI
2002
IEEE
15 years 11 months ago
2002
IEEE
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
182
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IPPS
2002
IEEE
15 years 11 months ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...