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» On bounding the delay of a critical path
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SLIP
2006
ACM
16 years 13 hour ago
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...
Jin Guo, Antonis Papanikolaou, Pol Marchal, Franck...
ICCAD
1998
IEEE
98views Hardware» more  ICCAD 1998»
15 years 10 months ago
Determination of worst-case aggressor alignment for delay calculation
Increases in delay due to coupling can have a dramatic impact on IC performance for deep submicron technologies. To achieve maximum performance there is a need for analyzing logic...
Paul D. Gross, Ravishankar Arunachalam, Karthik Ra...
CORR
2010
Springer
136views Education» more  CORR 2010»
15 years 4 months ago
Delay-Constrained Multicast Routing Algorithm Based on Average Distance Heuristic
Multicast is the ability of a communication network to accept a single message from an application and to deliver copies of the message to multiple recipients at different locatio...
Ling Zhou, Wei-xiong Ding, Yu-xi Zhu
JSAC
2010
135views more  JSAC 2010»
15 years 4 months ago
Provisioning mission-critical telerobotic control systems over internet backbone networks with essentially-perfect QoS
—Over the next decades, the Internet will evolve to support increasingly complex mission-critical services such as telerobotically controlled surgery. The world’s first telero...
T. H. Szymanski, D. Gilbert
DAC
2008
ACM
16 years 7 months ago
Path smoothing via discrete optimization
A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
Michael D. Moffitt, David A. Papa, Zhuo Li, Charle...