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ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
16 years 11 days ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
GPC
2008
Springer
15 years 7 months ago
Middleware Integration and Deployment Strategies for Cyberinfrastructures
Virtual Organizations require infrastructure that meets their scientific needs. Traditionally, a VO can require access to computational backends that are suited for interactive app...
Sebastien Goasguen, Krishna Madhavan, David Wolins...
FASE
2001
Springer
15 years 11 months ago
A CSP View on UML-RT Structure Diagrams
Abstract. UML-RT is an extension of UML for modelling embedded reactive and real-time software systems. Its particular focus lies on system descriptions on the architectural level,...
Clemens Fischer, Ernst-Rüdiger Olderog, Heike...
AAAI
1998
15 years 8 months ago
Intelligent Control of Life Support Systems for Space Habitats
The Interchamber Monitoring and Control (IMC) system is semi-autonomous, intelligent software that controls life support systems designed for recycling air in remote space habitat...
Debra Schreckenghost, Daniel Ryan, Carroll Thrones...
DAC
2007
ACM
16 years 7 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...