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ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
16 years 3 months ago
Limits on voltage scaling for caches utilizing fault tolerant techniques
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
Mohammad A. Makhzan, Amin Khajeh Djahromi, Ahmed M...
USENIX
2004
15 years 8 months ago
accept()able Strategies for Improving Web Server Performance
This paper evaluates techniques for improving the performance of three architecturally different web servers. We study strategies for effectively accepting incoming connections un...
Tim Brecht, David Pariag, Louay Gammo
FGCS
2000
96views more  FGCS 2000»
15 years 6 months ago
Logicflow execution model for parallel databases
The LOGFLOW parallel Prolog system is similar to the recent parallel database systems concerning its dataflow execution model and its capability of running on othing architectures...
Péter Kacsuk, Norbert Podhorszki
ENC
2004
IEEE
15 years 10 months ago
On the Hardware Design of an Elliptic Curve Cryptosystem
We present a hardware architecture for an Elliptic Curve Cryptography System performing the three basic cryptographic schemes: DH key generation, encryption and digital signature....
Miguel Morales-Sandoval, Claudia Feregrino Uribe
COOPIS
2002
IEEE
15 years 11 months ago
Composing and Deploying Grid Middleware Web Services Using Model Driven Architecture
Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of complex grid applications, such as large-scale distributed co...
Aniruddha S. Gokhale, Balachandran Natarajan