Sciweavers

2674 search results - page 208 / 535
» On architecture transparency in operating systems
Sort
View
ISCAS
2011
IEEE
261views Hardware» more  ISCAS 2011»
14 years 10 months ago
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Pa...
DAC
2004
ACM
16 years 7 months ago
Memory access scheduling and binding considering energy minimization in multi-bank memory systems
Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
Chun-Gi Lyuh, Taewhan Kim
ICYCS
2008
IEEE
16 years 1 months ago
VM-based Architecture for Network Monitoring and Analysis
A single physical machine provides multiple network monitoring and analysis services (e.g., IDS, QoS) which are installed on the same operating system. Isolation between services ...
Qiang Li, Qinfen Hao, Limin Xiao, Zhoujun Li
DATE
2007
IEEE
78views Hardware» more  DATE 2007»
16 years 1 months ago
Hardware scheduling support in SMP architectures
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
André C. Nácul, Francesco Regazzoni,...
ARTQOS
2003
Springer
16 years 2 days ago
An IP QoS Architecture for 4G Networks
: This paper describes an architecture for differentiation of Quality of Service in heterogeneous wireless-wired networks. This architecture applies an “all-IP” paradigm, with ...
Janusz Gozdecki, Piotr Pacyna, Victor Marques, Rui...