We present an efficient and accurate gate sizing tool that employs a novel piecewise convex delay model, handling both rise and fall delays, for static CMOS gates. The delay model...
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Newer Prolog implementations commonly offer support for multi-threading, and have also begun to offer support for tabling. However, most implementations do not yet integrate tablin...
— We present an augmented map interface called Phygital (physical, digital) Map that enables users to access digital multimedia stored in various off-the-shelf devices from physi...
Wireless networks and the voice over Internet protocol (VoIP) have recently been widely adapted. VoIP services over Ad-hoc network can be accomplished by middleware embedded in mob...