1529 search results - page 83 / 306 » On Timing Analysis of Combinational Circuits |
177
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RTAS
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
165
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PEPM
1993
ACM
15 years 10 months ago
1993
ACM
Binding-time analysis is a crucial component of an ofine partial evaluator. The accuracy of the binding-time information that it produces determines the degree of specialization o...
173
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ICIP
2009
IEEE
16 years 7 months ago
2009
IEEE
This paper presents a novel framework for applying semantic labels to events within a track. A track is a two-dimensional (2D) or a three-dimensional (3D) signal in time where eac...
159
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IOLTS
2009
IEEE
16 years 29 days ago
2009
IEEE
—Robust circuit design has become a major concern for nanoscale technologies. As a consequence, for design validation, not only the functionality of a circuit has to be considere...
129
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ASPDAC
2006
ACM
16 years 8 days ago
2006
ACM
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...