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CORR
2006
Springer
116views Education» more  CORR 2006»
15 years 6 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
CODES
2003
IEEE
15 years 11 months ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
ACSC
2006
IEEE
16 years 7 days ago
A framework for visual data mining of structures
Visual data mining has been established to effectively analyze large, complex numerical data sets. Especially, the extraction and visualization of inherent structures such as hie...
Hans-Jörg Schulz, Thomas Nocke, Heidrun Schum...
ASIACRYPT
2000
Springer
15 years 10 months ago
Construction of Hyperelliptic Curves with CM and Its Application to Cryptosystems
Abstract. Construction of secure hyperelliptic curves is of most important yet most difficult problem in design of cryptosystems based on the discrete logarithm problems on hyperel...
Jinhui Chao, Kazuto Matsuo, Hiroto Kawashiro, Shig...
DELTA
2004
IEEE
15 years 10 months ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi