8728 search results - page 375 / 1746 » On Reduct Construction Algorithms |
180
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— During volume testing, test application time, test data volume and high performance automatic test equipment (ATE) are the major cost factors. Embedded testing including builti...
195
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ICASSP
2008
IEEE
16 years 1 months ago
2008
IEEE
Consider a scenario where a distributed signal is sparse and is acquired by various sensors that see different versions. Thus, we have a set of sparse signals with both some commo...
169
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ISVLSI
2007
IEEE
16 years 1 months ago
2007
IEEE
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of b...
178
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GECCO
2007
Springer
16 years 29 days ago
2007
Springer
— In this paper, a parallel model of multi-objective genetic algorithm supposing a grid environment is discussed. In this proposed parallel model, we extended master-slave model ...
187
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...