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FCCM
2005
IEEE
106views VLSI» more  FCCM 2005»
16 years 2 days ago
High-Performance FPGA-Based General Reduction Methods
FPGA-based floating-point kernels must exploit algorithmic parallelism and use deeply pipelined cores to gain a performance advantage over general-purpose processors. Inability t...
Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna
DATE
2002
IEEE
87views Hardware» more  DATE 2002»
15 years 11 months ago
Model Reduction in the Time-Domain Using Laguerre Polynomials and Krylov Methods
We present a new passive model reduction algorithm based on the Laguerre expansion of the time response of interconnect networks. We derive expressions for the Laguerre coefficie...
Yiran Chen, Venkataramanan Balakrishnan, Cheng-Kok...
PAMI
2008
162views more  PAMI 2008»
15 years 6 months ago
Dimensionality Reduction of Clustered Data Sets
We present a novel probabilistic latent variable model to perform linear dimensionality reduction on data sets which contain clusters. We prove that the maximum likelihood solution...
Guido Sanguinetti
IPPS
2000
IEEE
15 years 10 months ago
Reduction Optimization in Heterogeneous Cluster Environments
Network of workstation (NOW) is a cost-effective alternative to massively parallel supercomputers. As commercially available off-the-shelf processors become cheaper and faster, ...
Pangfeng Liu, Da-Wei Wang
DAC
2008
ACM
16 years 7 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta