Sciweavers

3653 search results - page 516 / 731
» On Recognizable Timed Languages
Sort
View
PPDP
2005
Springer
16 years 1 days ago
Self-tuning resource aware specialisation for prolog
The paper develops a self-tuning resource aware partial evaluation technique for Prolog programs, which derives its own control strategies tuned for the underlying computer archit...
Stephen-John Craig, Michael Leuschel
SBCCI
2004
ACM
127views VLSI» more  SBCCI 2004»
15 years 12 months ago
A formal software synthesis approach for embedded hard real-time systems
Software synthesis is defined as the task of translating a specification into a software program, in a general purpose language, in such a way that this software can be compiled...
Raimundo S. Barreto, Marília Neves, Meuse N...
IFIP
2004
Springer
15 years 12 months ago
Multipath Power Sensitive Routing Protocol for Mobile Ad Hoc Networks
: Mobile Ad hoc Networks are characterized by multi-hop wireless links, without any infrastructure, and frequent host mobility. A plethora of routing protocols has been proposed. A...
Anand Prabhu Subramanian, A. J. Anto, Janani Vasud...
IFIP
2004
Springer
15 years 12 months ago
Selective Channel Scanning for Fast Handoff in Wireless LAN Using Neighbor Graph
: Handoff at the link layer 2 (L2) consists of three phases including scanning, authentication, and reassociation. Among the three phases, scanning is dominant in terms of time del...
Sang-Hee Park, Hye-Soo Kim, Chun-Su Park, Jae-Won ...
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 12 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...