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» On Ordering Descriptions in a Description Logic
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DAC
1994
ACM
15 years 10 months ago
Functional Test Generation for FSMs by Fault Extraction
Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
Bapiraju Vinnakota, Jason Andrews
ICCAD
1992
IEEE
93views Hardware» more  ICCAD 1992»
15 years 10 months ago
Timing analysis in high-level synthesis
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
CIE
2009
Springer
15 years 10 months ago
Functions Definable by Arithmetic Circuits
An arithmetic circuit is a labelled, directed, acyclic graph specifying a cascade of arithmetic and logical operations to be performed on sets of non-negative integers. In this pap...
Ian Pratt-Hartmann, Ivo Düntsch
ACMICEC
2006
ACM
120views ECommerce» more  ACMICEC 2006»
15 years 10 months ago
A semantic-based fully visual application for matchmaking and query refinement in B2C e-marketplaces
This paper presents a visual application in the framework of semantic-enabled e-marketplaces aimed at fully exploiting semantics of supply/demand descriptions in B2C and C2C e-mar...
Simona Colucci, Tommaso Di Noia, Eugenio Di Sciasc...
APWEB
2006
Springer
15 years 10 months ago
Named Graphs as a Mechanism for Reasoning About Provenance
Named Graphs is a simple, compatible extension to the RDF syntax that enables statements to be made about RDF graphs. This approach is in contrast to earlier attempts such as RDF r...
E. Rowland Watkins, Denis A. Nicole