Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
An arithmetic circuit is a labelled, directed, acyclic graph specifying a cascade of arithmetic and logical operations to be performed on sets of non-negative integers. In this pap...
This paper presents a visual application in the framework of semantic-enabled e-marketplaces aimed at fully exploiting semantics of supply/demand descriptions in B2C and C2C e-mar...
Simona Colucci, Tommaso Di Noia, Eugenio Di Sciasc...
Named Graphs is a simple, compatible extension to the RDF syntax that enables statements to be made about RDF graphs. This approach is in contrast to earlier attempts such as RDF r...