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» On Interpolation in Existence Logics
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DFT
2003
IEEE
113views VLSI» more  DFT 2003»
15 years 11 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
IRI
2003
IEEE
15 years 11 months ago
A Formal Framework for Design Component Contracts
– Building large software systems out of existing software components can save time and cost. These software components range from architectural and design components to binary c...
Jing Dong, Paulo S. C. Alencar, Donald D. Cowan
STEP
2003
IEEE
15 years 11 months ago
Using Grid Technologies for Web-Enabling Legacy Systems
The adoption of the Internet technologies favors the diffusion of Web and Grid-based applications. However, the development of new applications exploiting the modern interfaces an...
Thierry Bodhuin, Maria Tortorella
WECWIS
2003
IEEE
97views ECommerce» more  WECWIS 2003»
15 years 11 months ago
Matchmaking for Business Processes
Web services have a potential to enhance B2B ecommerce over the Internet by allowing companies and organizations to publish their business processes on service directories where p...
Andreas Wombacher, Peter Fankhauser, Bendick Mahle...
KCAP
2003
ACM
15 years 11 months ago
Learning programs from traces using version space algebra
While existing learning techniques can be viewed as inducing programs from examples, most research has focused on rather narrow classes of programs, e.g., decision trees or logic ...
Tessa A. Lau, Pedro Domingos, Daniel S. Weld