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» On Heuristic Time Hierarchies
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ASPDAC
1995
ACM
106views Hardware» more  ASPDAC 1995»
15 years 10 months ago
Performance driven multiple-source bus synthesis using buffer insertion
A heuristic algorithm for a given topology of a multiple-source and multiple-sink bus to reduce the signal delay time is proposed. The algorithm minimizes the delay by inserting bu...
Chia-Chun Tsai, De-Yu Kao, Chung-Kuan Cheng, Ting-...
ICML
2000
IEEE
16 years 7 months ago
Less is More: Active Learning with Support Vector Machines
We describe a simple active learning heuristic which greatly enhances the generalization behavior of support vector machines (SVMs) on several practical document classification ta...
Greg Schohn, David Cohn
EVOW
2007
Springer
16 years 17 days ago
Reducing the Size of Traveling Salesman Problem Instances by Fixing Edges
Abstract. The Traveling Salesman Problem (TSP) is a well-known NPhard combinatorial optimization problem, for which a large variety of evolutionary algorithms are known. However, t...
Thomas Fischer, Peter Merz
EOR
2007
103views more  EOR 2007»
15 years 6 months ago
Bi-criteria scheduling problems: Number of tardy jobs and maximum weighted tardiness
Consider a single machine and a set of   jobs that are available for processing at time 0. Job ¡ has a processing time ¢¤£ , a due date ¥¦£ and a weight §¨£ . We consid...
Yumei Huo, Joseph Y.-T. Leung, Hairong Zhao
ICCAD
2008
IEEE
150views Hardware» more  ICCAD 2008»
16 years 3 months ago
Performance estimation and slack matching for pipelined asynchronous architectures with choice
— This paper presents a fast analytical method for estimating the throughput of pipelined asynchronous systems, and then applies that method to develop a fast solution to the pro...
Gennette Gill, Vishal Gupta, Montek Singh