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DAC
2006
ACM
16 years 7 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
VLDB
2002
ACM
141views Database» more  VLDB 2002»
16 years 6 months ago
Data page layouts for relational databases on deep memory hierarchies
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill
TOG
2002
107views more  TOG 2002»
15 years 5 months ago
Ordered and quantum treemaps: Making effective use of 2D space to display hierarchies
Treemaps, a space-filling method of visualizing large hierarchical data sets, are receiving increasing attention. Several algorithms have been proposed to create more useful displ...
Benjamin B. Bederson, Ben Shneiderman, Martin Watt...
AIPS
2010
15 years 8 months ago
Classical Planning in MDP Heuristics: with a Little Help from Generalization
Heuristic functions make MDP solvers practical by reducing their time and memory requirements. Some of the most effective heuristics (e.g., the FF heuristic function) first determ...
Andrey Kolobov, Mausam, Daniel S. Weld
ICRA
2000
IEEE
124views Robotics» more  ICRA 2000»
15 years 10 months ago
Local Search Heuristics for the Assembly Line Balancing Problem with Incompatibilities Between Tasks
This paper deals with the Assembly Line Balancing Problem considering incompatibilities between the tasks with the aim of, first, minimizing the number of workstations and, then, ...
Joaquín Bautista, Raúl Suárez...