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» On Heuristic Time Hierarchies
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SEDE
2007
15 years 8 months ago
Case study: A tool centric approach for fault avoidance in microchip designs
— Achieving reliability in fault tolerant systems requires both avoidance and redundancy. This study focuses on avoidance as it pertains to the design of microchips. The lifecycl...
Clemente Izurieta
ERSA
2004
134views Hardware» more  ERSA 2004»
15 years 8 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
IJCAI
2003
15 years 7 months ago
Gaussian Process Models of Spatial Aggregation Algorithms
Multi-level spatial aggregates are important for data mining in a variety of scientific and engineering applications, from analysis of weather data (aggregating temperature and p...
Naren Ramakrishnan, Christopher Bailey-Kellogg
SDL
2003
147views Hardware» more  SDL 2003»
15 years 7 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
IC
2000
15 years 7 months ago
Tree Delta Transcoding for Efficient Dynamic Resource Delivery on Asymmetric Internet
The paper presents a scheme for serving dynamic resources over the Internet. The method uses a combination of structured fragmentation of dynamic resources in a tree hierarchy and...
Javed I. Khan